Navitas adds top-side cooled QDPAK and TO-247-4L
Navitas Semiconductor has announced the launch of two new packages: top-side cooled QDPAK and a low-profile TO-247-4L with asymmetrical leads in its 5th generation GeneSiC technology platform.
“Our customers are pushing the boundaries of what is possible in AI data centre and energy infrastructure applications," said Paul Wheeler, VP & GM of the SiC business unit at Navitas. "The introduction of top-side cooled QDPAK, and low-profile TO-247-4-LP packages is a direct response to the need for 'more power in less space'”.
The QDPAK package is designed to overcome the thermal limitations of conventional PCB cooling by enabling heat dissipation directly through the top of the package to the heatsink.
This optimised thermal path significantly improves heat dissipation efficiency and enables smaller system footprints. The package also minimises parasitic inductance, supporting cleaner switching and higher efficiency at high frequencies.
In addition, the QDPAK platform supports larger die sizes and higher current capability, facilitating the ultra-low RDS(ON) values for high-power applications, while its compact surface-mount profile enables scalable high-volume automated assembly.
Footprint is 15 mm x 21 mm in area with an ultra-low height of 2.3 mm. Creepage is optimised with a groove in the package mould compound that extends creepage to 5 mm without trading off the area of the exposed top-side thermal pad. In addition the package supports up to 1000 VRMS applications with an epoxy moulding compound (EMC) featuring a Comparative Tracking Index (CTI) of >600.
The low-profile TO-247-4-LP through-hole package variant is an optimised package for power electronics systems where vertical clearance is limited, such as high-density AI power racks. By minimising the height of the package on the PCBA, this package enables higher power density when compared with systems made with a standard TO-247-4 package.
It is said to provide a reduced vertical footprint on the PCBA to support compact form-factor requirements where conventional TO-247-4 package height is a constraint. It also features asymmetrical leads (thin leads for gate and Kelvin-source) to improve PCBA manufacturing tolerances. It targets applications like AI data centre power supplies, where form-factor and maximum allowable height are critical.
