Low-resistance contacts pave way for better GaN chips
Semiconductor devices are generally formed from two halves: an n-type which carries negative charge via electrons, and a p-type which moves positive charge carriers (holes). Both halves rely on contacts that can get electric current in and out with minimal loss of energy. But for thin p-type GaN semiconductors, these 'ohmic contacts' have been an efficiency bottleneck.
Now, a team led by Haitao Wang and Jia Wang at Nagoya University, has come up with a new way of lowering the resistance of p-type GaN contacts. They deposited an ultrathin magnesium layer onto the p-GaN surface and gave it a heat treatment at 600degC for five minutes, thereby achieving a contact resistivity of (1–3) × 10⁻⁴ Ω cm² without damaging the surface. This is among the lowest reported contact resistivities for thin p-type GaN.
Their findings, which they think will make a wide range of electronic devices in EVs and data centres more energy-efficient, have been published in the journal Applied Physics Letters.
Magnesium-doped p-type GaN was developed at Nagoya University by Isamu Akasaki and Hiroshi Amano in work recognised by the 2014 Nobel Prize in Physics for blue LEDs. In this material, holes are produced by adding small quantities of magnesium, which has one fewer valence electron than the surrounding gallium, in a process known as doping.
However, magnesium is a stubborn acceptor of electrons at room temperature. As a result, the metal-semiconductor boundary does not have enough mobile holes, resulting in a wide barrier called a depletion region. This barrier creates high resistance to the flow of charge and thus more energy is needed to drive currents across it.
One way to counter this high resistivity is to grow a heavily doped GaN layer with rich concentration of holes right at the interface. But this is a costly and laborious process that is vulnerable to damage under later device fabrication stages such as plasma etching.
To look for alternatives, a few years earlier, the same group tried depositing a layer of metal magnesium directly onto a GaN wafer and processed it with a heat treatment called annealing. This magnesium layer was relatively thick, measuring dozens of nanometers. In doing so, they also discovered the emergence of a remarkable superlattice structure.
“This superlattice was very interesting for fundamental science,” said Jia Wang, who led the 2024 study published in Nature. “But at that time, the surface after annealing was too rough, raising concerns about device reliability particularly for thin p-type GaN, so some of the benefits of this approach could not be fully demonstrated.”
To solve the roughness issue, Haitao Wang pivoted to depositing a much thinner magnesium film. The problem with this is magnesium’s high reactivity that makes it oxidise easily in air. To prevent this, a protective cap layer is typically used to isolate the magnesium from air. But all samples using a cap showed unwanted impurities.
“I then tried [a capless sample] as a reference, and it came out as a surprise,” Haitao Wang said. “I found that the cap didn’t make any difference.” It it likely that only the very top layer of magnesium gets oxidised, preserving the rest even if the total thickness is no more than 10 nanometers.
The researchers subjected this thin layer to a heat treatment called 'soft annealing' where the sample is heated to a lower temperature (600degC) and for a shorter time (five minutes) compared to normal annealing. During this process, the ultrathin magnesium layer gets rapidly consumed as the magnesium diffuses into the surface region of the p-type GaN. To the researchers’ delight, this new surface turned out to be much smoother than in their previous work.
This ultrathin, ultrahigh concentration magnesium doped layer narrowed down the contact depletion region and promoted tunneling of holes across it, thereby lowering contact resistance.
Further, this top-down process is a lot simpler, quicker, and cheaper to implement than bottom-up crystal growth. It can also be applied after device processing, making it more flexible and compatible with existing fabrication processes. As a result, it holds promise for accelerated commercialisation of higher-efficiency semiconductors.
“We are now applying this method to different types of devices like LEDs and transistors in electric vehicles,” said Wang.
